Ricoh 5A22

Ricoh · 1990 · Ricoh 5A22 (SNES CPU)

The SNES's main processor: a 65C816 — the 16-bit descendant of the 6502 — wrapped with DMA, multiply/divide hardware and controller logic. Its modest clock is why so many SNES games slow down.

The 5A22 was built by Ricoh around the Western Design Center 65C816, the 8/16-bit extension of the MOS 6502 that WDC developed between 1982 and 1984 and that also powered the Apple IIGS. Choosing a 6502 descendant meant that developers who had learned the NES — itself built on a Ricoh 6502 variant — could move to the new machine with familiar tools and instincts. The core has a 16-bit accumulator, an 8-bit data bus and a 24-bit address bus, and executes 92 instructions extended from the 6502 set. Its clock speed is not fixed. The chip runs at 3.58 MHz for internal cycles and for access to the SNES's B-bus registers, at 2.68 or 3.58 MHz when reaching memory on the A bus depending on the speed of that memory, and drops to 1.79 MHz when reading the serial controller registers. Most early cartridges used slower ROM, so most games ran at 2.68 MHz. That works out to roughly 1.5 MIPS — well below the Mega Drive's 68000 — and it is the main reason busy SNES shooters such as Gradius III and Super R-Type are remembered for slowdown. Ricoh compensated with on-chip help. A general DMA unit could copy data at about 2.68 MB/s, and H-blank DMA could update video registers on every scanline, which is how many SNES gradient, wave and pseudo-3D effects were produced without CPU effort. The chip also includes multiplication and division registers, V-blank interrupt generation and automatic controller reading. When games needed more processing than the 5A22 could deliver, Nintendo and its partners added it in the cartridge: the Super FX, SA-1 and DSP chips all existed partly because of the CPU's limits.